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AX99100 - PCIe转多I/O (4S, 2S+1P, 2S+SPI, LB) 控制器 | 亞信電子
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首页 >> 产品信息 >> I/O 连接控制器 >> PCIe 桥接器 >> AX99100

 AX99100 -- PCIe转多I/O (4S, 2S+1P, 2S+SPI, LB) 控制器 New!

The AX99100 is a single chip solution that fully integrates PCIe 2.0 Gen 1 end-point controller and SerDes with a variety of peripherals such as four High Speed Serial Ports, one Parallel Port, I²C Master, High Speed SPI, Local Bus (ISA-Like) , and GPIOs. It consists of four main configurations such as 4S (PCIe to Quad Serial), 2S+1P (PCIe to Dual Serial and Single Parallel), 2S+SPI (PCIe to Dual Serial and SPI), and LB (PCIe to Local Bus/ISA-Like) for different kinds of applications.

The AX99100, in 68-pin QFN, are available with RoHS compliant package and supports commercial grade operating temperature range from 0 to 70°C and industrial grade from -40 to 85°C.

规格:

  • PCI Express
    • Single-lane (X1) PCI Express End-point Controller with PHY integrated
    • Compliant with PCI Express 2.0 Gen 1
    • Compliant with PCI Express card specifications
    • Compliant with PCI Power Management 1.2
    • Supports four PCI Express functions
    • Supports both legacy and MSI Interrupt
    • Supports ASPM Power Management
  • Serial Port Interface
    • Dual or Quad UARTs
    • Supports RS-232/RS-422/RS-485 multiprotocol
    • Bi-directional speeds up to 25 Mbps per port
    • Full Serial Modem Control
    • Supports Hardware, Software Flow Control
    • Supports 5, 6, 7, 8 and 9-bit Serial format
    • Supports Even, Odd, None, Space and Mark parity
    • Supports Custom baud rate by internal PLL or external clock
    • Supports On Chip 256 Byte depth FIFOs in Transmit, Receive path of each Serial Port
    • Supports remote wakeup and power management features
    • Serial Port transceiver shutdown support
    • Supports Slow IrDA mode (up to 115200bps) on all Serial Ports
    • Supports multi-drop application for 9-bit mode
    • Supports DMA burst transfer
  • Parallel Port
    • Compatible with IEEE 1284 – SPP/Byte/ECP Mode
  • SPI Interface
    • Programmable SPI clock frequency up to 42MHz
    • Supports Mode 0, Mode 1, Mode 2 and Mode 3 timing modes
    • Supports MSB/LSB first transfer fashion
    • Programmable peripheral chip select, selecting up to 7 SPI devices
    • Supports Non-Burst-Type transfer up to 8 bytes and/or Burst-Type transfer via DMA mode for high performance
    • Supports to fragment large data block into several smaller transfers on SPI bus to reduce software loading
    • Supports programmable transfer 0 ~ 8 bytes OP-Code field in each transfer automatically to reduce software loading
    • Supports wake-up by SWAKEn pin from Slave
  • Local Bus Interface
    • Supports memory or I/O access through PCIe BAR0/1 to local bus interface, each BAR mapping to local bus\' chip select (CS0n and CS1n)
    • Supports direct access and bus master access (auto-increment and fixed address)
    • Supports 8-bit or 16-bit data bus width (little and big endian bus swap)
    • Supports up to 2 Kbytes address space and 2 chip select outputs when separated address/data bus style
    • Supports up to 64 Kbytes address space and 2 chip select outputs when multiplexed address/data bus style
    • Supports programmable local chip select region
    • Supports “Slave Request based DMA” access for interfacing with external device with bus master
    • Supports clock out, CLKO, up to 62.5MHz
    • Supports asynchronous or synchronous Local Bus with required clock output, CLKO
    • Supports programmable bus access cycles, self-terminated bus access cycles and back-to-back turnaround cycles
    • Supports programmable RSTO, ALE, RDY, DREQ0/1, DACK0/1, CLKO polarity, and INT0/1 level/edge trigger
    • Supports wake-up by INT0/1 and DREQ0/1 pins
  • Supports I²C Master Interface
  • Up to 24 bi-directional GPIO lines including 8 dedicated GPIO and 16 multi-function GPIO
  • Integrates on-chip power-on reset circuit
  • On Chip 3.3 to 1.2V Regulator
  • 68-pin QFN RoHS compliant package
  • Operating temperature range: 0 to 70°C or -40 to +85°C

 方块图

AX99100_BlockDaigram.jpg

 选型指南

IO_PCIe_Selection.jpg

 开发板

AX99100 PCIe to 4S Demo Board  可提供
 This is an AX99100 PCIe to 4S adapter for users to evaluate AX99100 PCIe to 4S functionalities.
AX99100 PCIe to 2S1P Demo Board  可提供
 This is an AX99100 PCIe to 2S1P adapter for users to evaluate AX99100 PCIe to 2S1P functionalities.
AX99100 PCIe to 2S1SPI Demo Board  可提供
 This is an AX99100 PCIe to 2S1SPI adapter with embedded SPI Flash for users to evaluate AX99100 PCIe to 2S1SPI functionalities.
AX99100 PCIe to Local Bus + Async. SRAM Module Demo Board  可提供
 This is an AX99100 PCIe to Local Bus + Async. SRAM Module adapter for users to evaluate AX99100 PCIe to Local Bus interface functionalities.
 
 Included AX99100 Local Bus Async. SRAM Module Board

技术文档

 产品简述 , 产品介绍和数据手册

AX99100 产品简述327.3 KB2016-02-23
Download
AX99100 Product Introduction 841.4 KBV0.102016-04-21
Download
AX99100 Datasheet 2.2 MBV0.242016-06-06
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 参考手册和用户指南

AX99100 EEPROM User Guide   
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 报告

AX99100 Reliability Report 233.4 KB2016-10-14
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AX99100 RoHS Report   
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硬件设计文档

 参考电路图

AX99100 PCIe to 4S Demo Board Reference Schematic 368.8 KBV1.022016-05-22
Download
AX99100 PCIe to 2S1P Demo Board Reference Schematic 378.2 KBV1.032016-05-22
Download
AX99100 PCIe to 2S1SPI Demo Board Reference Schematic 353.7 KBV1.022016-05-22
Download
AX99100 PCIe to Local Bus Demo Board Reference Schematic 324.5 KBV1.012016-04-22
Download
AX99100 Local Bus Async SRAM Module Board Reference Schematic 222.5 KBV1.002016-03-18
Download

 物料清单, 应用说明和布线指南

AX99100 PCIe to 4S Demo Board BOM File 190.5 KB2016-06-07
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AX99100 PCIe to 2S1P Demo Board BOM File 191 KB2016-06-07
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AX99100 PCIe to 2S1SPI Demo Board BOM File 190.4 KB2016-06-07
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AX99100 PCIe to Local Bus Demo Board BOM File 190.8 KB2016-04-22
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AX99100 Local Bus Async SRAM Module Board BOM File 191.8 KB2016-03-18
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AX99100 Application Design Note 739.9 KB1.002016-05-10
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 PCB 版图, Gerber 和 IBIS模型文件

AX99100 PCIe to 4S/2S1P/2S1SPI Demo Boards PCB Layout Files 583.4 KB2016-02-22
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AX99100 PCIe to Local Bus Demo Board PCB Layout Files 272.7 KB2015-12-02
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AX99100 Local Bus Async SRAM Module Board PCB Layout Files 192 KB2015-12-02
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AX99100 PCIe to 4S/2S1P/2S1SPI Demo Boards Gerber Files 1.2 MB2016-02-22
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AX99100 PCIe to Local Bus Demo Board Gerber Files 1 MB2015-12-02
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AX99100 Local Bus Async SRAM Module Board Gerber Files 634.3 KB2015-12-02
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AX99100 IBIS Model 202.6 KB2016-09-07
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 工具软件

Windows EEPROM Utility   
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Windows MP Tool   
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 驱动程序

The following drivers are for standard AX99100 serial/parallel ports applications only. For AX99100 Local Bus/SPI/etc. special applications, please contact ASIX Support (Support@asix.com.tw) for further support.
OS类型版本 发布日期描述文件尺寸
Linux kernel 4.x/3.x/2.6.x Driver V1.3.02017-08-14For all Android systems, Linux kernel 2.6.15 and later56.1 KB
Download
Windows 10/8.x 32-bit Driver V1.18.2.02016-08-18For 32-bit x86 CPU platform, HLK/WHCK certified1.2 MB
Download
Windows 10/8.x 64-bit Driver V1.18.2.02016-08-18For 64-bit x86 CPU platform, HLK/WHCK certified1.3 MB
Download
Windows 7/Vista/XP 32-bit Driver V1.12.2.02016-08-18For 32-bit x86 CPU platform, WHCK certified1.1 MB
Download
Windows 7/Vista/XP 64-bit Driver V1.12.2.02016-08-18For 64-bit x86 CPU platform, WHCK certified1.1 MB
Download

 常见问题

click here for more AX99100 FAQs....
Q0001: Where can I obtain the latest AX99100 datasheet, reference schematic and other hardware design archives?
A0001: Please register MyASIX membership (http://www.asix.com.tw/RegLogin.php?mod=thisis) and then download the latest AX99100 datasheet, reference schematic, PCB layout guide, etc. from AX99100 Product web page (http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=256;74;110&PLine=74) directly.

Q0002: Can ASIX help me to review my own AX99100 schematic and PCB layout?
A0002: Yes, please deliver your own AX99100 schematic and PCB layout files to ASIX’s Support (support@asix.com.tw) for further review before making your own AX99100 PCB board.


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