| Q0001: | What drivers are available for AX88780? |
| A0001: | The AX88780 supports the following drivers platforms at this moment:
1. Windows CE 5.0 BSP driver
2. Linux kernel 2.6.x/2.4.x driver
Furthurmore, ASIX can provide the AX88780 Linux driver source code and the Software Programming Guide for customers who need to develop AX88780 driver on some other platforms. Please contact ASIX Sales (sales@asix.com.tw) for more details. |
| Q0002: | Does the AX88780 need an EEPROM device? |
| A0002: | The AX88780 supports serial EEPROM device with 16-bit data access, like 93C56 EEPROM. The EEPROM device is optional for AX88780. AX88780 will auto-load data from the EEPROM device during hardware reset. |
| Q0003: | How do I reset the internal PHY by driver? |
| A0003: | Procedures for software to reset AX88780 internal PHY:
1. Clear bit 1 (SRST_PHY) of MISC register to reset internal PHY.
2. Delay at least 4 seconds.
3. Configure PHY to normal operation mode by setting bit 1 (SRST_PHY) of MISC register. |
| Q0004: | What is the PHY address of AX88780 embedded PHY? |
| A0004: | The AX88780 integrates an embedded 10/100M Fast Ethernet PHY. The internal PHY address is 10h. |
| Q0005: | How do I enable the AX88780 internal PHY? |
| A0005: | You MUST set bit 8 (PHY_EN) of PHY_CTRL register to enable the AX88780 internal PHY because the internal PHY is disabled by default after hardware reset. |
| Q0006: | How do I know the actual Ethernet link mode of AX88780 internal PHY? |
| A0006: | The AX88780 internal PHY will reflect the actual Ethernet link mode on bit 13 (SPDSEL) and bit 8 (DPLX) of BMCR register after the auto-negotiation operation is completed. The bit 5 (AUTONEST) of BMSR register will be set to 1 when the auto-negotiation is completed. |
| Q0007: | How do I read/write MII PHY Registers? |
| A0007: | The AX88780 provides the MDIOCTRL and MDIODP registers to access the MII PHY registers. |
| Q0008: | How do I enable/disable the AX88780 interrupt? |
| A0008: | The AX88780 uses IMR register to enable/disable the interrupt function. The interrupt function can be enabled by setting a non-zero value into IMR register and can be disabled by setting a zero value into IMR register. |
| Q0009: | How do I enable/disable TX/RX Flow Control function? |
| A0009: | The AX88780 supports the TX/RX flow control function for 10/100M Full-duplex modes. Configure the following registers to enable TX/RX flow control function:
1. Set bit 12 (RXFLOW_EN) of the MAC_CFG0 register.
2. Set bit 0 and bit 8 of the RX_CFG register.
3. Set bit 5 and bit 6 of the MAC_CFG1 register. |
| Q0010: | How do I enable/disable the back-pressure function? |
| A0010: | The AX88780 supports the Back Pressure function for 10/100M Half-duplex modes. Configure the following registers to enable Back Pressure function:
1. Set bit 12 (RXFLOW_EN) of the MAC_CFG0 register.
2. Set bit 0 and bit 8 of the RX_CFG register.
3. Set bit 5 of the MAC_CFG1 register.
4. Write 0164h to the MAC_CFG2 register to configure Jam Limit value. |
| Q0011: | How do I get the AX88780 Software Programming Guide? |
| A0011: | Please contact ASIX Sales (sales@asix.com.tw) directly. |
| Q0012: | How to open the gerber files of AX88780 SMDK2440 demo board? |
| A0012: | You can open the gerber files of AX88780 SMDK2440 demo board by running ORACLE's AutoVue Evaluation Revision tool (30 days evaluation date). Please visit ORACLE's web site (http://www.oracle.com/) for more details. |
| Q0013: | How to open the Protel PCB layout file of AX88780 SMDK2440 demo board? |
| A0013: | You can open the Protel PCB layout file of AX88780 SMDK2440 demo board by running ORACLE's AutoVue Evaluation Revision tool (30 days evaluation date). Please visit ORACLE's web site (http://www.oracle.com/) for more details. |
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